Spread-spectrum codes generation

ABSTRACT

Certain aspects of the present disclosure relate to a method for generating Golay codes and generalized Golay codes in a wireless communication system, and for efficient spreading at a transmitter and despreading at a receiver.

BACKGROUND

1. Field

Certain aspects of the present disclosure generally relate tospread-spectrum coding and, more particularly, to a method for spreadingand de-spreading a signal.

2. Background

Spread-spectrum coding is a technique by which signals generated in aparticular bandwidth can be spread in a frequency domain, resulting in asignal with a wider bandwidth. The spread signal has a lower powerdensity, but the same total power as an un-spread signal. The expandedtransmission bandwidth minimizes interference to others transmissionsbecause of its low power density. At the receiver, the spread signal canbe decoded, and the decoding operation provides resistance tointerference and multipath fading.

Spread-spectrum coding is used in standardized systems, e.g. GSM,General Packet Radio Service (GPRS), Enhanced Digital GSM Evolution(EDGE), Code Division Multiple Access (CDMA), Wideband Code DivisionMultiple Access (WCDMA or W-CDMA), Orthogonal Frequency DivisionMultiplexing (OFDM), Orthogonal Frequency Division Multiple Access(OFDMA), Time Division Multiple Access (TDMA), Digital European CordlessTelecommunications (DECT), Infrared (IR), Wireless Fidelity (Wi-Fi),Bluetooth, Zigbee, Global Positioning System (GPS), Millimeter Wave (mmWave), Ultra Wideband (UWB), other standardized as well asnon-standardized systems, wireless and wired communication systems.

In order to achieve good spreading characteristics in a system usingspread spectrum, it is desirable to employ spreading codes which possessa near perfect periodic or aperiodic autocorrelation function, i.e. lowsidelobes level as compared to the main peak, and an efficientcorrelator-matched filter to ease the processing at the receiver side.Spreading codes with high peak and low sidelobes level yields betteracquisition and synchronization properties for communications, radar,and positioning applications.

In spread spectrum systems using multiple spreading codes, it is notsufficient to employ codes with good autocorrelation properties sincesuch systems may suffer from multiple-access interference (MAI) andpossibly inter-symbol interference (ISI). In order to achieve goodspreading characteristics in a multi code DS-CDMA system, it isnecessary to employ sequences having good autocorrelation properties aswell as low cross-correlations. The cross-correlation between any twocodes should be low to reduce MAI and ISI.

Complementary codes, first introduced by Golay in M. Golay,“Complementary Series,” IRE Transaction on Information Theory, Vol. 7,Issue 2, April 1961, are sets of complementary pairs of equally long,finite sequences of two kinds of elements which have the property thatthe number of pairs of like elements with any one given separation inone code is equal to the number of unlike elements with the same givenseparation in the other code. The complementary codes first discussed byGolay were pairs of binary complementary codes with elements +1 and −1where the sum of their respective aperiodic autocorrelation sequence iszero everywhere, except for the center tap.

Polyphase complementary codes described in R. Sivaswamy, “MultiphaseComplementary Codes,” IEEE Transaction on Information Theory, Vol. 24,Issue 5, September 1978, are codes where each element is a complexnumber with unit magnitude.

An efficient Golay correlator-matched filter was introduced by S.Budisin, “Efficient Pulse Compressor for Golay Complementary Sequences,”Electronic Letters, Vol. 27, Issue 3, January 1991, along with arecursive algorithm to generate these sequences as described in S.Budisin “New Complementary Pairs of Sequences,” Electronic Letters, Vol.26, Issue 13, June 1990, and in S. Budisin “New Multilevel ComplementaryPairs of sequences,” Electronic Letters, Vol. 26, Issue 22, October1990. The Golay complementary sequences described by Budisin are themost practical, they have lengths that are power of two, binary orcomplex, 2 levels or multi-levels, have good periodic and aperiodicautocorrelation functions and most importantly possess a highlyefficient correlator-matched filter receiver.

However, Golay sequences are not without drawbacks. First, Golaysequences don't exist for every length, for example binary complementaryGolay sequences are known for lengths 2^(M) as well as for some evenlengths that can be expressed as sum of two squares. Second, anefficient Golay correlator-matched filter exists only for Golaysequences generated by Budisin's recursive algorithm and that are oflength that is a power of two (i.e. 2^(M)). Third, the Golay sequencegenerated using Budisin's recursive algorithm might not possess thedesired correlation properties. Furthermore, good spreading sequencessuch as m-sequences, Gold sequences, Barker sequences and other knownsequences do not possess a highly efficientcorrelator-matched/mismatched filter.

Therefore, there is a need in the art for a method of spread spectrumcoding applied at the transmitter and an efficient method forde-spreading at the receiver.

SUMMARY

Certain aspects provide a method for wireless and wired communications.The method generally includes spreading at least one of the fields of adata stream with one or plurality of Golay sequences generated using apreferred Golay generator.

Certain aspects provide a method for wireless and wired communications.The method generally includes spreading at least one of the fields of adata stream with a Golay code or a generalized Golay code using apreferred Golay generator.

Certain aspects provide a method for wireless and wired communications.The method generally includes receiving a spread data stream wherein atleast one of the fields is spread with one or plurality of spreadingsequences, generating one a plurality of Golay and generalized Golaycodes and despreading the spread fields of the data stream.

BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the above-recited features of the presentdisclosure can be understood in detail, a more particular description,briefly summarized above, may be had by reference to aspects, some ofwhich are illustrated in the appended drawings. It is to be noted,however, that the appended drawings illustrate only certain typicalaspects of this disclosure and are therefore not to be consideredlimiting of its scope, for the description may admit to other equallyeffective aspects.

FIG. 1 illustrates an example wireless communication system, inaccordance with certain aspects of the present disclosure.

FIG. 2 illustrates various components that may be utilized in a wirelessdevice in accordance with certain aspects of the present disclosure.

FIG. 3 illustrates an example transceiver that may be used within awireless communication system in accordance with certain aspects of thepresent disclosure.

FIG. 4A illustrates an efficient Golay generator/correlator that may beused to generate a pair of Golay complementary codes or to performmatched filtering operations.

FIG. 4B illustrates an alternative efficient Golay generator/correlatorthat may be used to generate a pair of Golay complementary codes or toperform matched filtering operations.

FIG. 5A illustrates a preferred Golay generator in accordance withcertain aspect of the present disclosure which may be used at atransmitter to generate one or multiple generalized Golay codes that maybe used for spreading one or multiple fields of a data stream to betransmitted.

FIG. 5B illustrates one of the stages of the preferred binary Golaygenerator in accordance with certain aspect of the present disclosure.

FIG. 5C illustrates one of the stages of the preferred non-binary Golaygenerator in accordance with certain aspect of the present disclosure.

FIG. 6A illustrates a generalized Golay code in accordance to one aspectof the present disclosure which may be used at a transmitter to generateone or multiple generalized Golay codes that may be used for spreadingone or multiple fields of a data stream to be transmitted.

FIG. 6B illustrates a preferred generalized Golay generator inaccordance to one aspect of the present disclosure which may be used ata transmitter to generate one or multiple generalized Golay codes thatmay be used for spreading one or multiple fields of a data stream to betransmitted.

FIG. 7 a millimeter wave frame format using Golay and Generalized Golaycodes in accordance to one aspect of the present disclosure.

FIG. 8A illustrates an example generalized efficient Golay correlatorthat may be used within a wireless communication system in accordancewith certain aspects of the present disclosure.

FIG. 8B illustrates example implementation generalized efficient Golaycorrelator that may be used within a wireless communication system inaccordance with certain aspects of the present disclosure.

FIG. 9 illustrates an example generalized efficient parallel Golaycorrelator that may be used within a wireless communication system inaccordance with certain aspects of the present disclosure.

FIG. 10A illustrates example operations for spreading in accordance withcertain aspects of the present disclosure.

FIG. 10B illustrates example components capable of performing theoperations illustrated in FIG. 10A.

FIG. 10C illustrates an example operations for processing of spreadsignals at the receiver in accordance with certain aspects of thepresent disclosure.

FIG. 10D illustrates example components capable of performing theoperations illustrated in FIG. 10C.

FIG. 11A illustrates example operations for Golay codes generation andspreading in accordance with certain aspects of the present disclosure.

FIG. 11B illustrates example components capable of performing theoperations illustrated in FIG. 11A.

FIG. 11C illustrates an example operations for processing of spreadsignals at the receiver using preferred Golay generation methods inaccordance with certain aspects of the present disclosure.

FIG. 11D illustrates example components capable of performing theoperations illustrated in FIG. 11C.

FIG. 12A illustrates example operations for combined spreading andmodulation in accordance with certain aspects of the present disclosure.

FIG. 12B illustrates example components capable of performing theoperations illustrated in FIG. 12A.

FIG. 12C illustrates an example operations for processing of spread andmodulated signals at the receiver in accordance with certain aspects ofthe present disclosure.

FIG. 12D illustrates example components capable of performing theoperations illustrated in FIG. 12C.

DETAILED DESCRIPTION

Various aspects of the disclosure are described more fully hereinafterwith reference to the accompanying drawings. This disclosure may,however, be embodied in many different forms and should not be construedas limited to any specific structure or function presented throughoutthis disclosure. Rather, these aspects are provided so that thisdisclosure will be thorough and complete, and will fully convey thescope of the disclosure to those skilled in the art. Based on theteachings herein one skilled in the art should appreciate that the scopeof the disclosure is intended to cover any aspect of the disclosuredisclosed herein, whether implemented independently of or combined withany other aspect of the disclosure. For example, an apparatus may beimplemented or a method may be practiced using any number of the aspectsset forth herein. In addition, the scope of the disclosure is intendedto cover such an apparatus or method which is practiced using otherstructure, functionality, or structure and functionality in addition toor other than the various aspects of the disclosure set forth herein. Itshould be understood that any aspect of the disclosure disclosed hereinmay be embodied by one or more elements of a claim.

The word “exemplary” is used herein to mean “serving as an example,instance, or illustration.” Any aspect described herein as “exemplary”is not necessarily to be construed as preferred or advantageous overother aspects.

Although particular aspects are described herein, many variations andpermutations of these aspects fall within the scope and spirit of thedisclosure. Although some benefits and advantages of the preferredaspects are mentioned, the scope of the disclosure is not intended to belimited to particular benefits, uses, or objectives. Rather, aspects ofthe disclosure are intended to be broadly applicable to differentwireless technologies, system configurations, networks, and transmissionprotocols, some of which are illustrated by way of example in thefigures and in the following description of the preferred aspects. Thedetailed description and drawings are merely illustrative of thedisclosure rather than limiting, the scope of the disclosure beingdefined by the appended claims and equivalents thereof.

An Example Wireless Communication System

The techniques described herein may be used for various broadbandwireless and wired communication systems, including communicationsystems that are based on a single carrier transmission and OFDM.Aspects disclosed herein may be advantageous to systems employing UltraWide Band (UWB) signals including millimeter-wave signals, Code DivisionMultiple Access (CDMA) signals, and OFDM. However, the presentdisclosure is not intended to be limited to such systems, as other codedsignals may benefit from similar advantages.

FIG. 1 illustrates an example of a wireless communication system 100 inwhich aspects of the present disclosure may be employed. The wirelesscommunication system 100 may be a broadband wireless communicationsystem. The wireless communication system 100 may provide communicationfor a number of Basic Service Sets (BSSs) 102, each of which may beserviced by a Service Access Point (SAP) 104. A SAP 104 may be a fixedstation or a mobile station that communicates with Stations (STAs) 106.A BSS 102 may alternatively be referred to as cell, piconet or someother terminology. A SAP 104 may alternatively be referred to as basestation, a piconet controller, a Node B or some other terminology.

FIG. 1 depicts various stations 106 dispersed throughout the system 100.The stations 106 may be fixed (i.e., stationary) or mobile. The stations106 may alternatively be referred to as remote stations, accessterminals, terminals, subscriber units, mobile stations, devices, userequipment, etc. The stations 106 may be wireless devices, such ascellular phones, personal digital assistants (PDAs), handheld devices,wire-less modems, laptop computers, personal computers, etc.

A variety of algorithms and methods may be used for transmissions in thewireless communication system 100 between the SAPs 104 and the STAs 106and between STAs 106 themselves. For example, signals may be sent andreceived between the SAPs 104 and the STAs 106 in accordance with CDMAtechnique and signals may be sent and received between STAs 106 inaccording with OFDM technique. If this is the case, the wirelesscommunication system 100 may be referred to as a hybrid CDMA/OFDMsystem.

A communication link that facilitates transmission from a SAP 104 to aSTA 106 may be referred to as a downlink (DL) 108, and a communicationlink that facilitates transmission from a STA 106 to a SAP 104 may bereferred to as an uplink (UL) 110. Alternatively, a downlink 108 may bereferred to as a forward link or a forward channel, and an uplink 110may be referred to as a reverse link or a reverse channel. When two STAscommunicate directly with each other, a first STA will act as the masterof the link, and the link from the first STA to the second STA will bereferred to as downlink 112, and the link from the second STA to thefirst STA will be referred to as uplink 114.

A BSS 102 may be divided into multiple sectors 112. A sector 116 is aphysical coverage area within a BSS 102. SAPs 104 within a wirelesscommunication system 100 may utilize antennas that concentrate the flowof power within a particular sector 116 of the BSS 102. Such antennasmay be referred to as directional antennas.

FIG. 2 illustrates various components that may be utilized in a wirelessdevice 210 that may be employed within the wireless communication system100. The wireless device 210 is an example of a device that may beconfigured to implement the various methods described herein. Thewireless device 202 may be a SAP 104 or a STA 106.

The wireless device 202 may include a processor 204 which controlsoperation of the wireless device 202. The processor 204 may also bereferred to as a central processing unit (CPU). Memory 206, which mayinclude both read-only memory (ROM) and random access memory (RAM),provides instructions and data to the processor 204. A portion of thememory 206 may also include non-volatile random access memory (NVRAM).The processor 204 typically performs logical and arithmetic operationsbased on program instructions stored within the memory 206. Theinstructions in the memory 206 may be executable to implement themethods described herein.

The wireless device 202 may also include a housing 208 that may includea transmitter 210 and a receiver 212 in allow transmission and receptionof data between the wireless device 202 and a remote location. Thetransmitter 210 and receiver 212 may be combined into a transceiver 214.An antenna 216 may be attached to the housing 208 and electricallycoupled to the transceiver 214. The wireless device 202 may include oneor more wired peripherals 224 such as USB, HDMI, or PCIE. The wirelessdevice 202 may also include (not shown) multiple transmitters, multiplereceivers, multiple transceivers, and/or multiple antennas.

The wireless device 202 may also include a signal detector 218 that maybe used in an effort to detect and quantify the level of signalsreceived by the transceiver 214. The signal detector 218 may detect suchsignals as total energy, energy per subcarrier per symbol, powerspectral density and other signals. The wireless device 202 may alsoinclude a digital signal processor (DSP) 220 for use in processingsignals.

The various components of the wireless device 202 may be coupledtogether by a bus system 222, which may include a power bus, a controlsignal bus, and a status signal bus in addition to a data bus.

FIG. 3 illustrates an example of a transmitter 302 that may be usedwithin a wireless communication system 100 that utilizes CDMA or someother transmission technique. Portions of the transmitter 302 may beimplemented in the transmitter 210 of a wireless device 202. Thetransmitter 302 may be implemented in a base station 104 fortransmitting data 330 to a user terminal 106 on a downlink 108. Thetransmitter 302 may also be implemented its a station 106 fortransmitting data 330 to a service access point 104 on an uplink 110.

Data 306 to be transmitted are shown being provided as input to aforward error correction (FEC) encoder 308. The FEC encoder encodes thedata 306 by adding redundant bits. The FEC encoder may encode the data306 using convolutional encoder, Reed Solomon encoder, Turbo encoder,low density parity check (LDPC) encoder, etc. The FEC encoder 308outputs an encoded data stream 310. The encoded data stream 310 is inputto the mapper 314. The mapper 314 may map the encoded data stream ontoconstellation points. The mapping may be done using some modulationconstellation, such as binary phase-shift keying (BPSK), quadraturephase-shift keying (QPSK), 8 phase-shift keying (8PSK), quadratureamplitude modulation (QAM), constant phase modulation (CPM), etc. Thus,the mapper 312 may output a symbol stream 314, which may represents oneinput into a block builder 310. Another input in the block builder 310may be comprised of one or multiple of spreading codes produced by aspreading-codes generator 318.

The block builder 310 may be configured for partitioning the symbolstream 314, into sub-blocks and creating OFDM/OFDMA symbols or singlecarrier sub-blocks. The block builder may append each sub-block by aguard interval, a cyclic prefix or a spreading sequence from thespreading codes generator 318. Furthermore, the sub-blocks may be spreadby one or multiple spreading codes from the spreading codes generator318.

The output 320 may be pre-pended by a preamble 322 generated from one ormultiple spreading sequences from the spreading codes generator 324. Theoutput stream 326 may then be converted to analog and up-converted to adesired transmit frequency band by a radio frequency (RF) front end 328which may include a mixed signal and an analog section. An antenna 330may then transmit the resulting signal 332.

FIG. 3 also illustrates an example of a receiver 304 that may be usedwithin a wireless device 202 that utilizes CDMA or OFDM/OFDMA. Portionsof the receiver 304 may be implemented in the receiver 212 of a wirelessdevice 202. The receiver 304 may be implemented in a station 106 forreceiving data 306 from a service access point 104 on a downlink 108.The receiver 304 may also be implemented in a base station 104 forreceiving data 306 from a user terminal 106 on an uplink 110.

The transmitted signal 332 is shown traveling over a wireless channel334. When a signal 332′ is received by an antenna 330′, the receivedsignal 332′ may be down-converted to a baseband signal by an RF frontend 328′ which may include a mixed signal and an analog portion.Preamble detection and synchronization component 322′ may be used toestablish timing, frequency and channel synchronization using one ormultiple correlators that correlate with one or multiple spreading codesgenerated by the spreading code(s) generator 324′.

The output of the RF front end 326′ is input to the block detectioncomponent 316′ along with the synchronization information from 322′.When OFDM/OFDMA is used, the block detection block may perform cyclicprefix removal and fast Fourier transform (FFT). When single carriertransmission is used, the block detection block may perform de-spreadingand equalization.

A demapper 312′ may perform the inverse of the symbol mapping operationthat was performed by the mapper 312 thereby outputting soft or harddecisions 310′. The soft or hard decisions 310′ are input to the FECdecoder which provides an estimate data stream 306′. Ideally, this datastream 306′ corresponds to the data 306 that was provided as input tothe transmitter 302.

The wireless system 100 illustrated in FIG. 1 may be the UWB/millimeterwave system operating in the band including 57-64 GHz unlicensed bandspecified by the Federal Communications Commission (FCC).

Golay Codes

In one aspect of the disclosure, spreading codes generated by spreadingcode(s) generator 318 and 324 in a transmitter 302 are based on Golaycodes. A summary of Golay codes, their properties, generation andreception is provided next.

A Golay complementary pair of codes of length N=2^(M), denoted here aand b, are specified by a delay vector D=[D₁, D₂, . . . , D_(M)] withelements chosen as any permutation of {1, 2, 4, . . . , 2^(M)} and aseed vector W=[W₁, W₂, . . . , W_(M)]. Binary Golay complementarysequences are generated when the seed vector elements {W_(m)} are +1 or−1. Polyphase Golay complementary sequences are generated when the seedvector elements {W_(m)} are arbitrary complex numbers with unitmagnitude. Golay complementary pairs of length 1 are defined here as thepair of sequences a=[+1] and b=[+1]. Alternative Golay complementarypairs of length 1 can be used such as a=[+1] and b=[−1].

The following MATLAB code can be used to generate a pair of binary orpolyphase Golay complementary codes a and b of length N=2^(M) with M≧1,using Budisin's recursive algorithm. The inputs to the MATLAB functionbeing the delay vector D and seed vector W.

function [a,b] = GolayGeneratorI(D,W); M=length(D);N=2{circumflex over( )}M; a = [1 zeros(1,N−1)];b = a; for m=1:M,   I = mod([0:N−1]−D(m),N):  an = +W(m)*a + b(I+(1));   bn = −W(m)*a + b(I+(1));   a = an: b = bn;end; return;

It should be appreciated that the Golay code generation describe abovecan be modified in many ways and still yields a pair of complementaryGolay codes. The order of the adders and subtractors can be inverted,and the seed vector elements can multiply wither code a or b in theconstruction and still yields a pair of complementary Golay codes. Toclarify the above, we provide one (out of many) alternative MATLAB Golaycode generation, labeled “GolayGeneratorII”.

function [a,b] = GolayGeneratorII(D,W); M=length(D);N=2{circumflex over( )}M; a = [1 zeros(1,N−1)];b = a; for m=1:M,   I = mod([0:N−1]−D(m),N);  an = a + W(m)*b(I+(1));   bn = a − W(m)*b(I+(1));   a = an; b = bn;end; return;

A brief example of Golay complementary codes will now be provided.Consider Golay complementary codes of length 8 generated using the delayvector D=[2, 1, 4] and seed vector W=[+1, +1, −1]. The MATLAB code“GolayGeneratorII” yields the following two Golay complementary codes

a=[+1, +1, +1, −1, −1, +1, −1, −1]

b=[+1, +1, +1, −1, +1, −1, +1, +1]

The aperiodic autocorrelation function of sequences a and b, denotedhere R^(a) and R^(b) respectively, are

R^(a)=[−1, −2, −1, 0, +1, −2, +1, +8, +1, −2, +1, 0, −1, −2, −1]

R^(b)=[+1, +2, +1, 0, −1, +2, −1, +8, −1, +2, −1, 0, +1, +2, +1]

The sequences a and b are complementary in the sense that the sum, R, oftheir aperiodic autocorrelation functions, R^(a) and R^(b), is perfectin the sense that it has a main peak and no sidelobes

R=[0, 0, 0, 0, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0]

Even though a pair of Golay codes is defined to be complementary interms of their aperiodic autocorrelation functions, they have excellentperiodic properties as well. The periodic autocorrelation functionsC^(a) and C^(b) of the pair of above sequences a and b, are

C^(a)=[+8, 0, −4, 0, 0, 0, −4, 0]

C^(b)=[+8, 0, +4, 0, 0, 0, +4, 0]

And the sum, C, of their periodic autocorrelation functions is againperfect, i.e. a main of peak of strength 2N=16 and no sidelobes

C=[8, 0, 0, 0, 0, 0, 0, 0]

When used individually, we are interested in the correlation propertiesof either sequence a or sequence b of the Golay complementary pair. Inthe example above, the magnitude of the highest sidelobe-level of theaperiodic function of either code is 2 and magnitude of the highestsidelobe-level of the periodic function of either code is 4. So whenanalyzed individually these codes may not be the best codes to be usedas spreading codes.

FIG. 4A shows a circuit that can be configured as an efficient Golaygenerator that may be used to generate a pair of Golay complementarysequences that may be part of a transmitter 210 within a wireless device202. Alternatively, the circuit in FIG. 4A may be configured as anefficient Golay correlator (or matched filter) to be used in a receiver212 within a wireless device 202.

When configured an efficient Golay generator, the input 402 is aKronecker delta sequence δ(n) which has the value one at lag 0 (i.e. atn=0) and zero everywhere else. When configured as an efficient Golaycorrelator, the input 402 may be a quantized received signal x(n).

The Golay code generator/correlator of FIG. 4A comprises a sequence ofdelay components 404-1 to 404-M configured for providing a set of fixeddelays as specified by the elements of the delay vector D, a sequence ofmultipliers 406-1 to 406-M which multiply their input by the elements ofthe seed vector W, a sequence of subtractors 408-1 to 408-M and asequence of adders 410-1 to 410-M. The Golay code generator/correlatoris modular and comprises M stages, where the stage m, 416-m, with m=1,2, . . . , M, comprises a delay component 404-m, a multiplier by a seedelement 406-m, a subtractor 408-m, and an adder 410-m. The delaycomponent 404-m comprises D_(m) delay elements where each delay elementmay comprise R basic memory cells such as Flip-Flops, where R is thenumber of bits used to represent the inputs to the stage m, i.e. theoutputs 412-(m−1) and 414-(m−1)) of the previous stage. The stage-moutputs 412-m and 414-m are input to the next stage, i.e. stage m+1.When the circuit 400 operates as an efficient Golay generator, theoutputs 412-M and 414-M of the last stage are the Golay complementarysequences b_(n) and a_(n) with n=0, 1, . . . , N−1. When the circuit 400is configured as an efficient Golay correlator (matched filter), theoutputs 412-M and 414-M of the last stage are the convolution betweenthe input x(n) and the reverse and conjugate of the Golay complementarysequences, i.e. the circuit performs matched filter operations, and theoutputs 412-M and 414-M are x_(n)

b*_(-n) and x_(n)

a*_(-n) respectively.

In stage m, 416-m, the position of multiplier 406-m, adder 410-m, andsubtractor 408-m can be exchanged while still being a Golay codegenerator/correlator. To clarify the above, an alternative Golay codegnerator/correlator is provided in FIG. 4B. The input 452 is configuredas above, i.e. when the circuit is configured as an efficient Golaygenerator, the input is the Kronecker delta swquence δ(n), and when thecircuit is configured as n efficient Golay correlator, the input may bea quantized received signal x(n). The Golay code generator/correlatorcomprises a set of delay components 454-1 to 454-M set according to thedelay vector D, a set of multipliers 456-1 to 456-M where eachmultiplier multiplies its input with the corresponding element from theseed vector W, a set of subtractors 458-1 to 458-M, and finally a set ofadders 460-1 to 460-M.

The Golay codes provided above have multiple drawbacks. The efficientGolay generator for a code length 2^(M) is of high complexity ascompared tor example to a maximal-length sequence (m-sequence) generatorfor m-sequences of length 2^(M)−1. The latter uses a linear feedbackshift register (LFSR) with M binary memory elements only. The seconddrawback is that Golay complementary codes do not exist for everylength, for-example there ere no Golay codes of odd length. Finally,Golay complementary codes have perfect correlation properties when usedtogether in specific ways, but when used individually, these codes arenot necessarily optimal.

Preferred Golay Generator

In one aspect of the present disclosure, Golay codes may be used asspreading codes and the spreading-codes(s) generator 318 and/or thespreading code(s) generator 324 in transmitter 302 may be configured togenerate Golay codes using a preferred Golay code generator.

FIG. 5A shows a preferred binary Golay generator 500 according to oneaspect of the disclosure. The circuit 500 generates a pair of Golaycomplementary sequence b_(n) and a_(n) with n=0, 1, . . . , N−1, whereN=2^(M). The delay vector D in this configuration is set to D=[2^(M−1),2^(M−2), . . . , 2⁰] the seed vector W=[W₁, W₂, . . . , W_(M)] haselements {W_(m)} which are logic 0 or 1. The circuit 500 comprises Mstages. The first stage inputs 512-1 and 514-1 are tied to input 502 setto a Kronecker delta sequence δ(n) which has the value one at lag 0(i.e. at n=0) during the first clock cycle of master clock CLK and zeroeverywhere else. Stage m with m=1, 2, . . . , M has five inputs and twooutputs. The first two inputs 512-m and 514-m are the outputs of theprevious stage, i.e. stage m−1. The third input 516-m is the m^(th) bitof a count-down coaster 608 driven by a clock signal 606 labeled CLK.The fourth input is the seed element W_(m), and the fifth input 518-m isa signal that takes on the values 0 and 1 and is generated by thecontrol unit 610.

The counter 508 is initialized to N−1 and decrements by 1 for each clockcycle of signal CLK. The most significant bit of the counter (i.e. bitof weight 2^(N−1)) is signal 516-1 and the least significant bit of thecounter (i.e. bit of weight 2⁰) is signal 516-M. The counter acts as aclock divider, and the signal 516-m is actually a clock signal withfrequency equal to the main signal CLK divided by 2^(M+1−m), i.e.CLK/2^(M+1−m). In another aspect of the disclosure, signal 516-m is usedas an enable signal that enables input 512-m to be input to stage mblock 504-m.

The M bits out of the counter 508 are inverted before being input to thecontrol unit 512 with inverters 510-1 to 510-M. The inverted input isequivalent to a counter initialized to zero and counting up by 1 foreach clock cycle of signal CLK. The control unit 512 generates M controlsignals 518-1 to 518-M. The first control signal 518-1 is 1 when theinput to the control unit (i.e. the up counter) is equal N/2 and zerootherwise. The m^(th) control signal 518-m is 1 when the input to thecontrol unit is in the following set of 2^(m−1) integers [D_(m),D_(m)+2^(M+1−m), D_(m)+2^(M+2−m), . . . , D_(m)+2^(M)−2M+1−m and zerootherwise. The M_(th) control signal 518-M is 1 when the input to thecontrol unit is in the following set of N/2=2^(M−1) integers {1, 3, 5, .. . , N−1} and zero otherwise.

FIG. 5B shows an example implementation of the stage-m in circuit 500according to one aspect of the disclosure. The inputs 542, 544, 546 and550 correspond to inputs 512-m, 514-m, 516-m, and 518-m to stage m incircuit 500. The input 548 is seed element W_(m). The circuit 540comprises a basic memory storage element (such as a Flip-Flop) 546driven by input 542. The output of the 556 is XORed in logic XOR gate548 with signal 548, i.e. with the seed element W_(m). The stage-mcircuit 500 comprises as well a logic INVERTER 560, two AND gates 562and 568, and two XOR gates 564 and 566. The outputs 552 and 554correspond to outputs 516-m and 518-m in stage m of circuit 500. Theoutputs 552 and 554 are equal so the input 544 when the signal 550 isset to zero, i.e. the input passes through to the two outputs. Whensignal 550 is set to one, input 540 should be zero and the output 554 isequal to the output of XOR gate 558 while output 552 is the inverse ofoutput 554.

The preferred Golay generator in FIG. 5A where each stage may beimplemented as shown in FIG. 5B has a very low complexity as compared tothe efficient Golay generator shown in FIG. 4A or FIG. 4B. The outputsof the preferred Golay generator are logic 0 and 1 which when mapped tobinary levels −1 and +1 yields equivalent output to the efficient Golaygenerator in FIG. 4B. In order to compare the two architectures,consider for example the generation of a binary Golay code of length128, i.e. M=7, and N=128, with delay vector D=[2^(M−1), 2^(m−2), . . . ,2⁰] and an arbitrary binary seed vector W=[W₁, W₂, . . . , W_(M)]. Theelements {W_(m)} are set to logic 0 or logic 1 in FIG. 5A whereas theyare set to +1 or −1 in FIG. 4A and FIG. 4B. Each stage in the preferredGolay generator comprises a single basic memory storage element such asa Flip-Flop, and therefore there the preferred Golay generator comprisesM basic memory storage elements and some logic gates, a counter and acontrol unit driven by a counter. The efficient Golay generatorcomprises 2(N−1)=254 basic memory storage elements, 2M multiplexers toimplement multiplication by the elements of the seed vector W, 2M addersand 2M subtractors where each of the adders and subtractors has 2 inputswith each input being represented with 2 bits (to represent +1, 0, and−1) and 2 bits output. The m-th stage in FIG. 4A or FIG. 4B has 2 ^(m)memory elements where each memory element comprises two basic memorystorage elements such as Flip-Flops. Therefore the total number of basicstorage elements is 2(2⁶+2⁵+ . . . +20=254 as indicated above.

In another aspect of the disclosure, in the preferred efficient Golaygenerator in FIG. 5A, the stage m implementation shown in FIG. 5B can beconfigured in many different ways while still yielding a pair of binarycomplementary Golay codes. For example, the XOR gate 558 in FIG. 5B canbe moved to the lower branch, i.e. the lower input of the XOR gate canbe excited by signal 544 instead of being excited with the basic memorystorage element output. In addition, the XOR gate 560 can be placed atthe lower input to the AND gate 568. Furthermore, the XOR gate 558 andthe INVERTER 560 can be moved simultaneously as described above.

In another aspect of the disclosure, the stages 1 to M in the preferredefficient Golay generator in FIG. 5A can be configured to operate withany arbitrary non-binary (possibly complex) seed vector W. Consider thegeneration of multilevel complex Golay complementary sequences where thereal and imaginary can be represented with R-bits integers, FIG. 5Cshows an implementation of the stage m, where m=1, 2, . . . , M,according to one aspect of the disclosure. The inputs 572, and 574 arethe outputs of the previous stage, i.e. stage m−1, and each can berepresented as two R-bits integers, one R-bits integer for the real partand one R-bits integer for the imaginary part. The memory component 586is clocked with signal 576 corresponding to the m^(th) bit 516-m in FIG.5A. The memory component 586 comprises 2R basic memory storage elementssuch as flip-flops (i.e. 2R flip-flops), R basic memory storage elementsto store the real part and R basic memory storage elements to store theimaginary part. The complex output of the memory component 586 ismultiplied using a complex multiplier with input 578, where input 578 isthe m^(th) seed element W_(m). The output of multiplier 578 is beinggated through multiplier 590 with control signal 580 corresponding tothe m^(th) control signal 518-m in FIG. 5A. By gating we mean that whencontrol signal 580 is one, the output of multiplier 590 passes throughto subtractor 592 and to adder 594, and when control signal 580 is zero,the output multiplier 590 is being blocked, i.e. set to zero. The outputof multiplier 590, i.e. the gated signal, and signal 574 are input tosubtractor 592 and adder 594 to yield outputs 582 and 584, where eachoutput is composed of an R-bit integer for the real part and R-bitinteger for the imaginary part.

According to another aspect of the present disclosure, the stage mcircuit in FIG. 5C can be manipulated in many ways while still yieldinga pair of Golay complementary sequences when used in the preferred Golaygenerator shown in FIG. 5A. As an example, multiplier 588 can be movedto the lower branch, i.e. connected to input 574 rather than to theoutput of the memory component 586. Multiplier 590 can be moved to lowerbranch along with multiplier 588. Subtractor 592 and adder 594 can beexchanged, and so on.

According to another aspect of the disclosure, the stages 1 to M in thepreferred efficient Golay generator in FIG. 5A can be configured tooperate with arbitrary delay vector D and any arbitrary non-binary(possibly complex) seed vector W. The stage m memory component 586 inFIG. 5C, changes its state 2^(m−1) times, i.e. stores its input at clockcycles {0, 2^(M+1−m), 2^(M+2−m), . . . , 2^(M)−2^(M+1−m)} of the masterclock CLK 506 in FIG. 5A. Gating signal 580 in FIG. 5C is high 2^(m−1)times at clock cycles {D_(m), D_(m)+2^(M+1−m), D_(m)+2^(M+2−m), . . . ,D_(m)+2^(M)−2^(M+1−m)} of master CLK 506 in FIG. 5A. If D_(m) is lessthan 2^(M+1−m), i.e. if the first stored input (stored at clock cycle 0)in the memory component is being consumed (at clock cycle D_(m)) beforethe memory component stores its second input (at clock cycle 2^(M+1−m)), than stage-m is FIG. 5B for the binary case, and stage-m inFIG. 6A for the general case need not to be changed. If on the otherhand If D_(m) is bigger than 2^(M+1−m) but less than 2^(M+2−m), than inorder for the second input not to overwrite the first input before beingconsumed, the memory component 556 in FIG. 5B and the memory component616 in FIG. 6A should contain two memory elements instead of one in oneaspect of the disclosure. The remainder of the circuits in FIG. 5B andFIG. 6A remain unchanged. For example memory component 556 in FIG. 5Bmay be implemented as a shift register of two Flip-Flops to accommodatethe above described matter. Therefore, in one aspect of the disclosure,the memory component 556 in FIG. 5B and the memory component 586 in FIG.5C should contain L memory elements instead of one where L is the indexsatisfying the following constraint 2 ^(M+L−1−m)≦D_(m)≦2^(M+L−m).According to the aspect of the disclosure, memory element 556 in FIG. 5Bwould comprise L basic memory storage element (which can be implementedfor example as a shift register of L flip-flops) and memory element 586in FIG. 5C, would comprise 2R basic memory storage elements (2Rflip-flops for example), R basic memory storage elements for the realpart and R basic memory storage elements for the imaginary part.

Spreading of Transmission Signal

In another aspect of the present disclosure, the spreading-codes(s)generator 518 and/or the spreading codes(s) generator 524 may beconfigured to generate generalized-Golay spreading codes.

A generalized-Golay spreading code is a code that has a Golaydecomposition, i.e. a code formed by concatenating a plurality of Golaycodes as shown in FIG. 3. The Golay codes used to form ageneralized-Golay code can be a type “a” or “b”, i.e. either one of thecomplementary pair of Golay codes can be used, and can be of differentlengths. As shown in FIG. 6A, a Generalized-Golay code of lengthN=N₁+N₂+ . . . +N_(L) is formed by concatenating a first Golay code602-1, labeled x₁, of type “a” or “b” and of length N₁, to a second codeGolay code 602-2, labeled x₂, of type “a” or “b” and of length N₂, andso on. The number of Golay codes, L, is such that L≧2. Unlike Golaycodes, generalized-Golay codes can be of any length, i.e. even, odd,prime, power of two, etc.

In the following, an example of generalized-Golay code according to oneaspect of the disclosure is provided. There are no Golay complementarysequences of length 24. In accordance to one aspect of the disclosure, ageneralized-Golay sequence of length 24 can be generated by appending aGolay code of length 8 to a Golay code to a length 16. The Golaycomponents should be chosen properly as for the generalized-Golay codeto have good correlation properties. A construction example is asfollows. First, a pair of Golay complementary codes a₁ or sequence b₁ oflength 16 can be Generated using delay vector D=[4, 8, 1,2] and seedvector W=[+1, +1, +1, +1]:

a₁=[+1, +1, +1, −1, +1, +1, +1, −1, +1, −1, +1, +1, −1, +1, −1, −1]

b₁=[+1, +1, −1, +1, +1, +1, −1, +1, +1, −1, −1, −1, −1, +1, +1, +1]

Second, a pair of Golay complementary codes a₂ and b₂ of length 8 can begenerated using delay vector D=[4, 2, 1] and seed vector W=[+1, +1, +1]:

a₂=[+1, +1, +1, −1, +1, +1, −1, +1]

b₂=[+1, −1, +1, +1, +1, −1, −1, −1]

Finally, a generalized-Golay code c of length 24 is formed as follows

c=[a₂ b₁]=[+1, +1, +1, −1, +1, +1, +1, −1, +1, −1, +1, +1, −1, +1, −1,−1, +1, −1, +1, +1, +1, −1, −1, −1]

The generalized-Golay sequence c has good correlation properties. Themaximum sidelobe-level magnitude of the aperiodic and periodicautocorrelation functions is 4 compared to a peak of magnitude 24 whichmakes it a good spreading code. The generalized code d=[b₂ a₁](constructed from the sequences b₂ and a₁ complementary to the sequencesa₂ and b₁ used to form c) is not complementary to c; the sum of theiraperiodic autocorrelations have very few sidelobes and therefore it ispseudo-complementary.

A second example of generalized-Golay code according to one aspect ofthe disclosure is provided next. A generalized code c of length 19 isgenerated by concatenating three short codes. The first constituentGolay code a₁=[1] is of type “a” and length 1, the second constituentGolay code a₂=[+1, +1] is of type “a” and length 2 generated usingD₂=[1] and W₂=[+1], and the third constituent Golay code b₃=[+1, −1, −1,+1, −1, −1, +1, +1, −1, −1, −1, −1, +1, −1, +1, −1] is of type “b” andlength 16 generated using D₃=[4, 1, 8, 2] and W₃=[−1, −1, −1, +1]. Theresulting generalized code c is shown below

c=[+1, +1, +1, +1, −1, −1, +1, −1, −1, +1, +1, −1, −1, −1, −1, +1, −1,+1, −1]

This length 19 sequence has a periodic autocorrelation function withmaximum sidelobe-level magnitude of 1 as compared to the main peak of 19and has similar properties to maximal length sequences also known asm-sequences.

In one aspect of the disclosure, the generalized Golay codes can begenerated by concatenating the outputs of a plurality of preferred Golaygenerators as shown in FIG. 6B. This shall be referred to as preferredGeneralized Golay generator. The generalized-Golay code in FIG. 6B is oflength N=N₁+N₂+ . . . +N_(L) and can be written as

x(n)=x ₁(n)+x ₂(n−N ₁)+ . . . +x _(L)(n−N ₁ −N ₂ − . . . −N _(L-1))

And therefore can be implemented as shown in FIG. 6B. The input 612 is aKronecker delta sequence δ(n) which has the value one at lag 0 (i.e. atn=0) and zero everywhere else. The input 612 is being delayed throughdelays 614-1 to 614-(L−1) before exciting the preferred Golay generators618-1 to 618-(L−1). The first delay component 614-1 may be implementedas N₁ basic memory storage elements (such as N₁ flip-flops), and the(L−1)^(th) delay element 614-(L−1) may be implemented as N_(L-1) basicmemory storage elements (such as N₁ flip-flops). The output 618-1 ofpreferred Golay generator 616-1 is the first Golay code x₁(n), theoutput 618-2 of preferred Golay generator 616-2 is the second Golay codein the Golay decomposition, i.e. x₂(n−N₁) delayed by N₁ elements, andthe output 618-L of preferred Golay generator 616-L is the L^(th) Golaycode in the Golay decomposition, i.e. x_(L)(n−N₁−N₂− . . . −N_(L-1))delayed by N₁+N₂+ . . . +N_(L-1). The outputs 618-1 to 619-L aredemultiplexed through demultiplexer 620 to yield the desired generalizedGolay code at output 622. In one aspect of the disclosure, the memorycomponents in the first stages of preferred Golay generators 616-1 to616-L may be shared in order to reduce hardware complexity. As anexample of preferred generalized Golay code generation, the length 24generalized complementary code described above can be generated usingtwo preferred Golay generators, a first preferred binary Golay generator616-1 as shown in FIG. 5B configured for a delay vector D=[4, 8, 1, 2]and seed vector W=[1, 1, 1, 1] and a second preferred binary Golaygenerator 616-2 as shown in FIG. 5B configured for a delay vector D=[4,2, 1] and seed vector W=[1, 1, 1].

Exemplary Millimeter Wave System

In accordance to one aspect of the disclosure, a generalized-Golay codeis used as a spreading sequence in a millimeter-wave system operating inthe 57-64 GHz frequency band as detailed below.

FIG. 7 illustrates a millimeter wave frame structure that may beemployed by an aspect of the invention. The frame structure is for acontrol channel that may be used in wireless communication system 100 inFIG. 1 for beaconing transmission from a service access point 104,association between a station 106 and the service access point 104,medium access layer (MAC) command frames and responses between station106 and the service access point 104, and peer to peer control channelbetween two stations, etc. A frame (or packet) comprises a preamble 702,header 704, and packet payload 708. The preamble may comprise a packetsync sequence field 708, a start-frame delimiter field 710, and achannel-estimation sequence field 712. The frame delimiter field 710 andthe channel-estimation sequence filed 712 may be combined into a singlechannel-estimation sequence filed. The sync sequence 211 is a repetitionof ones spread by Golay codes a₁₂₈ and/or b₁₂₈ (i.e. one of two Golaycomplementary codes of length 128 or both). The start-frame delimiterfield 212 comprises a sequence {1 −1 1 −1 . . . } spread by a₁₂₈ and/orb₁₂₈ to indicate the end of the sync field. The channel-estimation field712 may be spread using a₅₁₂ and/or b₅₁₂. The header and data fields 202and 203 may be binary or complex-valued, and spread using generalizedGolay code c₃₂ according to one aspect of the disclosure.

Golay codes of length N=2^(M) where M is odd, such as N=32, do exist,however they do not have good correlation properties to be used used asspreading codes for the header 704 and payload 706. When used asspreading codes, we are interested in the maxim and/or root-mean-square(r.m.s) sidelobe level of the aperiodic autocorrelation function of thecode. The best Golay code length N=2^(M) where M is odd, has a maximumsidelobe level of 2^((M+1)/2), the main peak being N. For example, thebest Golay code of length 32 has a maximum sidelobe level of 8.

In one aspect of the disclosure, a generalized Golay code of lengthN=2^(M) where M is odd, such as N=32, is used as a spreading code forthe header 704 and/or data 706 instead of a Golay code. GeneralizedGolay codes of length N=2^(M) where M is odd have better periodic andaperiodic correlation properties when compared to Golay codes of thesame length. In the following an example of a generalized Golay code oflength N=32 is provided. First, a pair of Golay complementary codes a₁of sequence b₁ of length 16 is generated using delay vector D=[8, 2, 4,1] and seed vector W=[+1, +1, +1, +1] in MATLAB code “GolayGeneratorI”:

a₁=[+1, +1, +1, +1, +1, −1, −1, +1, +1, +1, −1, −1, +1, −1, +1, −1]

b₁=[+1, −1, +1, −1, +1, +1, −1, −1, +1, −1, −1, +1, +1, +1, +1, +1]

Second, a pair of Golay complementary codes a₂ and b₂ of length 16 isgenerated using delay vector D=[8, 1, 4, 2] and seed vector W=[+1, +1,+1, −1]:

a₂=[−1, +1, −1, +1, +1, +1, −1, −1, −1, −1, −1, −1, +1, −1, −1, +1]

b₂=[+1, −1, −1, +1, −1, −1, −1, −1, +1, +1, −1, −1, −1, +1, −1, +1]

Finally, a generalized-Golay code c of length 32 is formed as follow

c=[b₁ b₂]=[+1, −1, +1, −1, +1, +1, −1, −1, +1, −1, −1, +1, −1, −1, +1,+1, +1, +1, +1, +1, −1, −1, +1, −1, −1, −1, −1, +1, +1, −1, −1, −1, +1,−1, +1]

The constructed generalized Golay code c of length 32 has a maximumsidelobe level of 4 for its periodic autocorrelation function, asidelobe level of 5 for its aperiodic autocorrelation function.Furthermore, this code has a maximum sidelobe level of 6 when modulationand interference from adjacent symbols is taken into accounts. Toelaborate on this last point, two adjacent symbols after spreading by acode c₃₂ of length 32 chips will take one of four possibilities [+c₃₂,+c₃₂], [+c₃₂, −c₃₂], [−c₃₂, +c₃₂], and [−c₃₂, −c₃₂] corresponding to thefour cases of the two symbols being [+1 +1], [+1, −1], [−1, +1], and [−1−1]. In this case we are interested in the sidelobe level afterreception and correlation using a matched filtering, i.e. convolutionwith c₃₂(−n), and is described above, the constructed generalized Golaycode has a maximum sidelobe level of 6 when modulation and interferencefrom adjacent symbols is taken into accounts.

According to one aspect of the disclosure, a generalized Golay code oflength N=2^(M) where M is odd, having a maximum sidelobe level of2^((M−1)/2) for its aperiodic autocorrelation function may be used as aspreading code of header 704 and/or payload 706. This is to be comparedto the maximum sidelobe level of 2^((M+1)/2) for the aperiodicautocorrelation function of the best Golay codes. As an example, a firstGolay code a₁=[+1, +1, +1, −1, +1, +1, −1, +1, +1, +1, +1, −1, −1, −1,+1, −1] of type “a”, length 16 constructed using a delay vector D=[8, 4,2, 1] and seed vector W=[+1, +1, +1, +1] is concatenated with a secondGolay code b₂=[+1, −1, −1, −1, +1, +1, −1, +1, −1, +1, −1, −1, −1, −1,−1, +1] of type “b”, length 16 constructed using a delay vector D=[8, 2,1, 4] and seed vector W=[−1, +1, +1, +1] to obtain a generalized Golaycode of length 32

c=[a₁ b₂]=[+1, +1, +1, −1, +1, +1, −1, +1, +1, +1, +1, −1, −1, −1, +1,−1, +1, −1, −1, −1, +1, +1, −1, +1, −1, +1, −1, −1, −1, −1, −1, +1]

The constructed generalized Golay code has maximum sidelobe level of 4for its aperiodic autocorrelation function. This is to be compared witha sidelobe level of 8 for the best Golay codes of the same length.

In another aspect of the disclosure, generalized Golay codes of lengthN=2^(M) where M is odd, having a maximum sidelobe level of 2^((M−1)/2)for its periodic autocorrelation function may be used for the sync field708. This is to be compared to the maximum sidelobe level of 2^((M+1)/2)for Golay codes. For example, a generalized Golay code of the length 128may be constructed by concatenating a first Golay code of length 64 oftype “a ” or “b” to a Golay code of length 64 of type “a” or “b”. Theresulting generalized Golay code of length 128 may be selected byconstruction to have a maximum sidelobe level of 8 and may be used forthe sync filed 708.

In FIG. 7, the header 704 is spread using one bit per symbol. If theheader consists of P symbols [h₁, h₂, . . . , h_(P)] where each symbolconsists of a single bit, than the spread header consists of fields720-1 to 720 P, i.e. [h₁c₃₂, h₂c₃₂, . . . , h_(P)c₃₂], and therefore forexample, the modulated (or spread) first bit is c₃₂, if bit h₁ is +1,the modulated (or spread) first bit is −c₃₂, if bit h₁ is +1 and so on.The same explanation applies to payload 706.

In another aspect of the disclosure, a data stream may be modulatedusing a plurality of generalized Golay codes to seed multiple bits perspread symbol. The modulation may be achieved using a combined spreadingand binary complex or multilevel constellation. As an example, header704 can use two generalized Golay codes of length N to send two bits perspread symbol, i.e. we can send bits h₁ and h₂ in the first spreadsymbol, bits h₃ and h₄ in the second spread symbol, and so on, whereeach spread symbol is of length N. This is best illustrated with thefollowing example. Consider a pair of generalized Golay codes of lengthN=32, labeled here as c₃₂ and d₃₂. The m^(th) spread symbol (m=1, 2, . .. , P/2), labeled s_(m)that is used to send bit h_(2m−1) and h_(2m),will be encoded as follows,

h_(2m−1)=+1, h_(2m+1)=+1 than s_(m)=+c₃₂

h_(2m−1)=+1, h_(2m+1)=−1 than s_(m)=−c₃₂

h_(2m−1)=−1, h_(2m+1)=+1 than s_(m)=+d₃₂

h_(2m−1)=−1, h_(2m+1)=−1 than s_(m)=−d₃₂

In another aspect of the disclosure, a data stream may be modulatedusing a pair of pseudo complementary generalized Golay codes to send twobits per spread symbol. A pair of generalized Golay codes is pseudocomplementary if the constituents Golay codes used to construct thefirst generalized Golay code are the complementary of the constituentsGolay codes used to construct the second generalized Golay code. As anexample, consider two pairs of complementary Golay codes, a first paira_(1,16) and b_(1,32), and a second pair a_(2,16) and b_(2,16). We canconstruct two pseudo-complementary generalized Golay codes of length 32,labeled here as c₃₂ and d₃₂, as follows

c₃₂=[a_(1,16), b_(2,16)]

d₃₂=[b_(1,16), a_(2,16)]

as another example, the following pair c₃₂=[a_(1,16), −a_(2,16)] andd₃₂=[b_(1,16), b_(2,16)] is also a pair of pseudo-complementarygeneralized Golay codes. In another aspect of the disclosure, a datastream may be modulated using multiple pairs of pseudo complementarygeneralized Golay codes to send multiple bits per spread symbol.

In another aspect of the disclosure a data stream may be modulated usinga plurality of generalized Golay codes to send multiple bits per spreadsymbol using one of phase shift keying and quadrature amplitudemodulation. As an example, a data stream can be divided into blocks ofbits, each comprising a set of three consecutive bits, and wherein twoof the three bits are used to select a point from a QPSK constellation(i.e. +1, or −1, or +j, or −j ) using Gray mapping and the remainder bitis used to select one of two pseudo complementary generalized Golaycodes c and d. The following is an example of the mapping between them^(th) group of bits, d_(3m−2)d_(3m−1)d_(3m), and the spread symbols_(m) of the modulated data stream

d_(3m−2)d_(3m−1)d_(3m)000 than s_(m)=+c

d_(3m−2)d_(3m−1)d_(3m)001 than s_(m)=+d

d_(3m−2)d_(3m−1)d_(3m)010 than s_(m)=+jc

d_(3m−2)d_(3m−1)d_(3m)011 than s_(m)=+jd

d_(3m−2)d_(3m−1)d_(3m)100 than s_(m)=−jc

d_(3m−2)d_(3m−1)d_(3m)101 than s_(m)=−jd

d_(3m−2)d_(3m−1)d_(3m)110 than s_(m)=−c

d_(3m−2)d_(3m−1)d_(3m)111 than s_(m)=−d

FIG. 10A illustrates example operations 1000 that summarize thespread-spectrum coding applied at a transmission side of the wirelesscommunication system. At 1002, an original transmission data stream maybe obtained. Then, at 1004, the data stream may be may be spread using ageneralized Golay spreading code which may be generated using thepreferred Golay generator such as the one illustrated in FIG. 5A. At1006, a spread preamble based on one or multiple Golay and generalizedGolay codes is appended to the spread data stream before transmission toform a packet. At 1008, the spread data stream may be transmitted.

FIG. 11A illustrates example operations 1100 that summarize thespread-spectrum coding applied at a transmission side of the wirelesscommunication system. At 1102, an original transmission data stream maybe obtained. Then, at 1104 one or multiple Golay and generalized Golaycodes are generated using a preferred Golay generator such as the oneillustrated in FIG. 5A. Then, at 1206, at least a portion of the datastream may be may be spread using the generated codes. At 1208, thespread data stream may be transmitted.

FIG. 12A illustrates example operations 1200 that summarize thespread-spectrum modulation applied at a transmission side of thewireless communication system. At 1202, an original transmission datastream may he obtained. Then, at 1204 at least a portion of the datastream is modulated using a plurality of generalized Golay codes byencoding groups of K bits into one of the plurality of generalized Golaycodes multiplied by a constellation point chosen from a constellationsuch as phase shift keying. At 1206, the modulated data stream may betransmitted.

The various operations of methods described above may be performed byany suitable means capable of performing the corresponding functions.The means may include various hardware and/or software components(s)and/or modules(s), including, but not limited to a circuit, anapplication specific integrated circuit (ASIC), or processor. Generally,where there are operations illustrated in Figures, those operations mayhave corresponding counterpart means-plus-function components withsimilar numbering. For example, blocks 1002-1008, 1102-1108 and1202-1206, illustrated in FIGS. 10A, 11A and 12A correspond to circuitblocks 1022-1028, 1122-1128, and 1222-1228 illustrated in FIGS. 10B, 11Band 12B.

Despreading of Received Signal

According to one aspect of the disclosure, a received spread data streamis processed at the receiver using a generalized efficient Golaycorrelator. As an example, the received signal 332′ in FIG. 3, may bedespread using a generalized efficient Golay correlator as part of thepreamble detection & synchronization block 322′ and/or as part of theblock detection 316′.

FIG. 8A shows a generalized efficient Golay correlator according to oneaspect of the disclosure. The generalized Golay correlator functions asa matched filter to a spread transmitted signal using a generalizedGolay sequence c(n) such as that illustrated in FIG. 6A. The generalizedGolay correlator may also provides matched filtering to othergeneralized Golay codes constructed using the same constituent Golaycodes as generalized Golay sequence c(n). The Input signal 802, denotedhere y(n), is input to a shift register composed of memory component804-1 to memory component 804-(L−1). In the general case, the inputsignal 802 can be a complex number and may be represented using R-bitsfor its real part and R-bits for its imaginary part. In this case,memory component D₁ is composed of N₁ delay elements (N₁ being thelength of the first Golay code 602-1 in FIG. 6A) where each delayelement comprises 2R-bits, R-bits to store the real past and R-bits tostore the imaginary part, and memory component D₂ is composed of N₂delay elements (N₂ being the length of the first Golay code 602-2 inFIG. 6A) where each delay element comprises 2R-bits, R-bits to store thereal part and R-bits to store the imaginary and so on. Signal 802, y(n),is input to a first efficient Golay correlator 806-1, and the output808-1 is the convolution between input y(n) and a matched filter impulseresponse to the first Golay component 602-1 in FIG. 6A, i.e., output808-1 equals to y(n)

x*₁(−n). The second output 810-1 is the convolution between input y(n)and a matched filter impulse response to the complementary of the firstGolay code x₁(n). The output of memory component 804-1 is the inputsignal delayed by N₁ chips, i.e. y(n−N₁) and is input to the secondefficient Golay correlator 806-2. The output of 806-2 is the convolutionbetween input y(n−N₁) and a matched filter impulse response to thesecond Golay component 602-2 in FIG. 6A, i.e., output 808-2 equals toy(n−N₁)

x*₁ (−n). The second output 810-2 is the convolution between inputy(n−N₁) and a matched filter impulse response to the complementary ofthe second Golay code x₂(n). The output of memory component 804-(L−1) isthe input signal delayed by N₁+N₂+ . . . +N_(L-1) chips, i.e. y(n−N₁−N₂−. . . −N_(L-1)) and is input to the L^(th) efficient Golay correlator806-L. The output of 806-L is the convolution between input y(n−N₁−N₂− .. . −N_(L-1)) and a matched filter impulse response to the last Golaycomponent 602-L in FIG. 6A, i.e., output 808-L equals to y(n−N₁−N₂− . .. −N_(L-1))

x*_(L)(−n). The second output 810-L is the convolution between inputy(n−N₁−N₂− . . . −N_(L-1)) and a matched filter impulse response to thecomplementary of the L^(th) Golay code x_(L)(n). The outputs 808-1,808-2, to 808-L of the matched filters to the Golay components arecombined through adder 812-1 to yield a generalized Golaycorrelator/matched filter output 814-1, y(n)

c*(−n). The outputs 801-1, 802-2 to 802-L and 810-1, 810-2 to 810-L canbe combined in different ways to provide convolution between inputsignal y(n) and a multitude of generalized Golay codes constructed usingthe same constituent (components) Golay codes but different types ascode c(n), i.e. the output 814-2 is the output of the convolutionbetween y(n) and a matched filter to a second generalized Golay code,and 814-R is the output of the convolution between y(n) and a matchedfilter to an R^(th) generalized Golay code. As an example, output 814-2can be configured to provide the convolution between input y(n) and amatched filter to the pseudo-complementary of generalized Golay codec(n). Efficient Golay correlators 806-1 to 806-L may be implemented asshown in FIG. 4A or FIG. 4B.

According to one aspect of the disclosures, the memory components 804-1to 804-(L−1) and the memory components in the first stages of efficientGolay correlators 806-1 to 806-L may be shared in order to reducehardware complexity. An example of this aspect is provided next.Consider the matched filter implementation to the reverse of generalizedGolay code of length 32

c=[b₁ b₂]=[+1, −1, +1, −1, +1, +1, −1, −1, +1, −1, −1, +1, +1, +1, +1,+1, +1, −1, −1, +1, −1, −1, −1, −1, +1, +1, −1, −1, −1, +1, −1, +1]

constructed from two Golay codes of type “b”, code b₁ of length 16generated using delay vector D=[8, 2, 4, 1] and seed vector W=[+1, +1,+1, +1], and code b₂ of length 16 is generated using delay vector D=[8,1, 4, 2] and seed vector W=[+1, +1, +1, −1].

The generalized efficient Golay correlator/matched filter to a receivedsignal spread with the reverse code c(N−n) is shown in FIG. 8B accordingto one aspect of the disclosure. The input signal 822 is fed to a firstGolay efficient correlator 824. The memory componesnts 830-1, 803-2,830-3 and 830-4 comprise 8, 1, 4, and 2 delay elements corresponding tothe delay vector D=[8, 1, 4, 2]. Each delay element comprises 2R-bits,R-bits to store the real part and R-bits to store the imaginary part. Inaddition to memory components, the first efficient Golay correlatorcomprises subtractors 832-1, 832-2, and 832-3 and adders 834-1, 834-2,834-3, and 832-4. The component 830-4 is an adder rather than asubtractor since the last seed element of the seed vector W=[+1, +1, +1,−1] is −1. The outputs of the first efficient Golay correlator 840-1 and840-2 are the convolution between the input signal 822 and the matchedfiler response to codes b₂, and a₂ respecitively. According to FIG. 8A,the input 802 should be delayed by D₁ chips (D₁=16) before being inputto the second efficient Golay correlator. This is implemented in FIG. 8Bby sharing the first memory component 830-1 of the first efficient Golaycorrelator and using the ouput of 830-1 to feed a second memorycomponent 850 of 8 delay elements. This is equivalent to delaying theinput signal 822 by 16 delay elements. Sharing more componentss betweenthe first efficient Golay correlator 824 and the second efficient Golaycorrelator 826 is further possible depending on the delay vectors andsee vectors. The output of memory component 850 feeds the efficientGolay correlator 826. The second efficient Golay correlator 826comprises memory components 860-1, 860-2, 860-3 and 860-4 set accordingto delay vector D=[8, 2, 4, 1] of b₁, a set of subtractors 862-1, 862-2,862-3 and 862-4, and a set of adders 864-1, 864-2 and 864-3. Theresulting outputs 870-1 and 870-2 of the second efficient Golaycorrelator 826 are the convolution between the input signal 822 and thematched filter response to codes b₁ and a₁ respectively with the overallresults delayed by 16 chips. Finally, outputs 840-1 and 870-1 arecombined through adder 872-1 to yield desired output 874-1 which is theoutput of the generalized Golay correlator/matched filter to codec(N−n). Combining outputs 840-2 and 870-2 through adder 872-2 to yieldssignal 874-2 which is the output of the generalized Golaycorrelator/matched filter to the pseudo-complementary code of codec(N−n).

In one aspect of the disclosure, the generalized efficient Golaycorrelator can be used to despread a modulated data stream with a pairof pseudo complementary generalized Golay codes. For example, thecircuit in FIG. 8B provides two outputs 872-1 and 872-2 which may be thecorrelations between the received modulated data stream and two pseudocomplementary generalized Golay codes. The two outputs can be used todecode the encoded bits within the data stream.

For high speed communication such as millimeter wave systems, it isadvantageous to process the received signal in parallel according to oneembodiment of the invention. As an example, if the received signal input822 in FIG. 8B to be despread is demultiplexed by a factor of our; thanthe serial generalized Golay correlator shown in FIG. 8B can be modifiedaccordingly and will be referred to as a generalized parallel Golay. Theparallelization of the generalized Golay correlator in FIG. 8A will beillustrated with the example in FIG. 8B. It is sufficient to demonstratethe procedure for the efficient Golay correlator 824. Let y(n) be theinput 822, and let p₄(n) be the output 840-1 and q₄(n) the output 840-2,and let Y(z), P₄(z), and Q₄(z) be their respective z-transforms. Than wehave

$\begin{bmatrix}{P_{4}(z)} \\{Q_{4}(z)}\end{bmatrix} = {{{{\begin{bmatrix}z^{- 2} & 1 \\{- z^{- 2}} & 1\end{bmatrix}\begin{bmatrix}{- z^{- 4}} & 1 \\z^{- 4} & 1\end{bmatrix}}\begin{bmatrix}{- z^{- 1}} & 1 \\z^{- 1} & 1\end{bmatrix}}\begin{bmatrix}{- z^{- 8}} & 1 \\z^{- 8} & 1\end{bmatrix}}\begin{bmatrix}{Y(z)} \\{Y(z)}\end{bmatrix}}$

The above can be implemented in the stages as follows

${\begin{bmatrix}{P_{4}(z)} \\{Q_{4}(z)}\end{bmatrix} = {\begin{bmatrix}z^{- 2} & 1 \\{- z^{- 2}} & 1\end{bmatrix}\begin{bmatrix}{P_{3}(z)} \\{Q_{3}(z)}\end{bmatrix}}},{\begin{bmatrix}{P_{3}(z)} \\{Q_{3}(z)}\end{bmatrix} = {\begin{bmatrix}{- z^{- 4}} & 1 \\z^{- 4} & 1\end{bmatrix}\begin{bmatrix}{P_{2}(z)} \\{Q_{2}(z)}\end{bmatrix}}},{\begin{bmatrix}{P_{2}(z)} \\{Q_{2}(z)}\end{bmatrix} = {\begin{bmatrix}{- z^{- 1}} & 1 \\z^{- 1} & 1\end{bmatrix}\begin{bmatrix}{P_{1}(z)} \\{Q_{1}(z)}\end{bmatrix}}},{\begin{bmatrix}{P_{1}(z)} \\{Q_{1}(z)}\end{bmatrix} = {\begin{bmatrix}{- z^{- 8}} & 1 \\z^{- 8} & 1\end{bmatrix}\begin{bmatrix}{P_{2}(z)} \\{Q_{2}(z)}\end{bmatrix}}}$

Performing a polyphase decomposition of the above equations, using fourphases, we obtain the circuit shown in FIG. 9. First four phasesdecomposition is applied to input signal 902. This is achieved using ademultiplexer 904 and the outputs 906-1 to 906-4 are the four phases ofinput signal y(n). If samples of the input signal 902 are incoming at aspeed CLK, than each of signals 906-1 to 906-4 will be running atquarter the speed, i.e. at CLK/4. The first stage 932-1 computes thefour phases of the partial correlation signals P₁(z) and Q₁(z). Thedelay z⁻⁸ becomes a delay of 2 in the four phase decomposition.Therefore, memory components 908-1 to 908-4 comprise two delay elementseach. The output of the delay elements along with the four phases of theinput signal, i.e. 906-1 to 906-4, are input to subtractors 910-1 to910-4 and adders 912-1 to 912-4. The outputs of the subtractors 910-1 to910-4 are the four phases of signal p₁(n) and the outputs of the adders912-1 to 912-4 are the four phases of signal q₁(n). The second stage932-2 computes the four phases of signal p₂(n) and q₂(n). This stagecontains memory components 914-1 to 914-7 comprising a single delayelement each, subtractors 916-1 to 916-4, and adders 918-1 to 918-4. Theinterconnections between the output of delay components 914-1 to 914-7and subtractors 916-1 to 916-4, and adders 918-1 to 918-4 correspond tothe polyphase decomposition of matrix.

$\quad\begin{bmatrix}{- z^{- 1}} & 1 \\z^{- 1} & 1\end{bmatrix}$

The third stage computes the four phases of signal p₃(n) and q₃(n) usingmemory components 920-1 to 914-4 comprising a single delay element each,subtractors 922-1 to 922-4, and adders 924-1 to 924-4. Like stage 1, theinterconnections here between memory component 920-1 to 920-4 andsubtractors 922-1 to 922-4, and adders 924-1 to 924-4 do not involvesignals from other phases, i.e. subtractor 922-1 and adder 922-1 for thefirst phase for example do not use any signals from 920-2, 920-3 and920-4 that is memory components from phases 2, 3, and 4. This is becausethe delay in the multiplication.

$\begin{bmatrix}{P_{3}(z)} \\{Q_{3}(z)}\end{bmatrix} = {\begin{bmatrix}{- z^{- 4}} & 1 \\z^{- 4} & 1\end{bmatrix}\begin{bmatrix}{P_{2}(z)} \\{Q_{2}(z)}\end{bmatrix}}$

is z⁻⁴ and therefore no interconnections between the different phases isrequired. Finally, the fourth stage computes the four phases of thedesired output p₄(n). This stage comprises delay components 926-1 to926-6 comprising a single delay element and adders 928-1 to 928-4. Theoutputs 930-1 to 930-4 are four phases of the desired output p₄(n).

Therefore, according to one aspect of the disclosure, a received spreaddata stream may be despread using a generalized efficient parallel Golaycorrelator/matched filter.

When a data stream is not spread using a generalized Golay code, it isstill possible to sue a generalized (serial or parallel) Golaycorrelator to despread the signal. In this case, the generalizedefficient (serial or parallel) Golay correlator acts as a mismatchedfilter rather than as a matched filter. As an example, consider a datastream that is spread using an m-sequence of length 15. First Golaydecomposition is performed to find a generalized Golay code that is theclosest to the m-sequence as possible. Closeness can be measures usingdifferent criterions such as minimum mean square error, hammingdistance, etc. Once a generalized Golay code is found that is anapproximation of the m-sequence, the spread data stream can be despreadat the receiver using the efficient generalized Golay correlator whichacts as a mismatch filter.

Aspects of the disclosure may be configurable for generating codes sets,updating code acts, and/or reassigning user cods in response to demandfor network resources, changes in the number of users accessing thenetwork, individual user-access requirements, changes insignal-propagation characteristics (e.g., multipath, Doppler, path loss,etc.), and/or interference (e.g., inter-symbol interference,multiple-access interference, jamming, etc.). Aspects of the disclosuremay provide for flexible code lengths, support multiple levels ofQuality of Service (QoS), and/or allow for system overloading. Aspectsof the disclosure may be optimized for minimum processing complexity,such as to enable suitability for real-time applications, rapid updates,low power consumption, and/or low cost processing components. Particularaspects of the disclosure may be configure to provide for the previouslyrecited features and advantages and/or alternative features andadvantages.

FIG. 10C illustrates example operations 1040 that may be performed toprocess received spread signals. The receiving method provides forprocessing signals transmitted by a transmit-side signal processor (suchas the receiver 304 in FIG. 3) after the signals have propagated througha multipath channel. Receiver front-end processing provides fordown-converting and digitizing received signals in order to producedigital baseband signals.

At 1044, the baseband spread data stream composed of a spread preambleand a header/payload which might be spread as well. At 1046, thepreamble is despread using a generalized efficient Golay correlator suchas the one illustrated in FIG. 8A. At 1046, if the header and payloadare spread using any spreading codes, than they are despread using aserial or parallel generalized efficient Golay correlator such as theones illustrated in FIGS. 8A and 9.

FIG. 11C illustrates example operations 1140 that may be performed toprocess received spread signals. The receiving method provides forprocessing signals transmitted by a transmit-side signal processor (suchas the receiver 304 in FIG. 3) after the signals have propagated througha multipath channel. Receiver front-end processing provides fordown-converting and digitizing received signals in order to productdigital baseband signals.

At 1144, the baseband spread data stream composed of a spread preambleand a header/payload which might be spread as well. At 1144, one ormultiple Golay and Generalized Golay codes are generated using apreferred Golay generator such as the ones illustrated in FIGS. 5A and6B. At 1146, at least a portion of the spread data stream despread usingthe one or multiple generated codes.

FIG. 12C illustrates example operations 1240 that may be performed toprocess received modulated signals. The receiving method provides forprocessing signals transmitted by a transmit-side signal processor (suchas the receiver 304 in FIG. 3) after the signals have propagated througha multipath channel. Receiver front-end processing provides fordown-converting and digitizing received signals in order to producedigital baseband signals.

At 1244, the baseband modulated data stream is demodulated using ageneralized Golay decoder such as the ones illustrated in FIGS. 8A, 8Band 9. At 1246, the original data is estimated using the output of thegeneralized Golay decoder.

The various operations of methods described above may be performed byany suitable means capable of performing the corresponding functions.The means may include various hardware and/or software component(s)and/or module(s), including, but not limited to a circuit, anapplication specific integrated circuit (ASIC), or processor. Generally,where there are operations illustrated in Figures, those operations mayhave corresponding counter means-plus-function components with similarnumbering. For example, blocks 1042-1048, 1142-1148, and 1142-1146,illustrated in FIGS. 10C, 11C and 12C correspond to circuit blocks1062-1068, 1162-1168, and 1262-1266 illustrated in FIGS. 10D, 11D and12D.

As used herein, the term “determining” encompasses a wide variety ofactions. For example, “determining” may include calculating, computing,processing, deriving, investigating, looking up (e.g., looking up in atable, a database or another data structure), ascertaining and the like.Also, “determining” may include receiving (e.g., receiving information),accessing (e.g., accessing data in a memory) and the life. Also,“determining” may include resolving, selecting, choosing, establishingand the like.

The various operations of methods described above may be performed byany suitable means capable of performing the operations, such as varioushardware and/or software components(s), circuits, and/or module(s).Generally, any operations illustrated in the Figures may be performed bycorresponding functional means capable of performing the operations.

The various illustrative logical blocks, modules and circuits describedin connection with the present disclosure may be implemented orperformed with a general purpose processor, a digital signal processor(DSP), an application specific integrated circuit (ASIC), a fieldprogrammable gate array signal (FPGA) or other programmable logic device(PLD), discrete gate or transistor logic, discrete hardware componentsor any combination thereof designed to perform the functions describedherein. A general purpose processor may be a microprocessor, but a inthe alternative, the processor may be any commercially availableprocessor, controller, microcontroller or state machine. A processor mayalso be implemented as a combination of computing devices, e.g., acombination of a DSP and a microprocessor, a plurality ofmicroprocessors, one or more microprocessors in conjunction with a DSPcore, or any other such configuration.

The steps of a method or algorithm described in connection with thepresent disclosure may be embodied directly to hardware, in a softwaremodule executed by a processor, or in a combination of the two. Asoftware module may reside in any form of storage medium that is knownin the art. Some examples of storage media that may be used includerandom access memory (RAM), read only memory (ROM), flash memory, EPROMmemory, EEPROM memory, registers, a hard disks, a removable disk, aCD-ROM and so forth. A software module may comprise a singleinstruction, or many instructions, and may be distributed over severaldifferent code segments, among different programs, and across multiplestorage media. A storage medium may be coupled to a processor such thatthe processor can read information from, and write information to, thestorage medium. In the alternative, the storage medium may be integralto the processor.

The methods disclosed herein comprise one or more steps or actions forachieving the described method. The method steps and/or actions may beinterchanged with one another without departing from the scope of theclaims. In other words, unless a specific order of steps or actions isspecified, the order and/or use of specific steps and/or echoes may bemodified without departing from the scope of the claims.

The functions described may be implemented its hardware, software,firmware or any combination thereof. If implemented in software, thefunctions may be stored as one or more instructions on acomputer-readable medium. A storage media may be any available mediathat can be accessed by a computer. By way of example, and notlimitation, such computer-readable media can comprise RAM, ROM, EEPROM,CD-ROM or other optical disk storage, magnetic disk storage or othermagnetic storage devices, or any other medium that can be used to carryor store desired program code in the form of instructions or datastructures and that can be accessed by a computer. Disk and disc, asused herein, include compact disc (CD), laser disc, optical disc,digital versatile disc (DVD), floppy disk, and Blu-ray® disc where disksusually reproduce data magnetically, while discs reproduce dataoptically with lasers.

Thus, certain aspects may comprise a computer program product forperforming the operations presented herein. For example, such a computerprogram product may comprise a computer readable medium havinginstructions stored (and/or encoded) thereon, the instructions beingexecutable by one or more processors to perform the operations describedherein. For certain aspects, the computer program product may includepackaging material.

Software or instructions may also be transmitted over a transmissionmedium. For example, if the software is transmitted from a website,server, or other remote source using a coaxial cable, fiber optic cable,twisted pair, digital subscriber line (DSL), or wireless technologiessuch as infrared, radio, and microwave, then the coaxial cable, fiberoptic cable, twisted pair, DSL, or wireless technologies such asinfrared, radio, and microwave are included in the definition oftransmission medium.

Further, it should be appreciated that modules and/or other appropriatemeans for performing the methods and techniques described herein can bedownloaded and/or otherwise obtained by a user terminal and/or basestation as applicable. For example, such a device can be coupled to aserver to facilitate the transfer of means for performing the methodsdescribed herein. Alternatively, various methods described herein can beprovided via storage means (e.g., RAM, ROM, a physical storage mediumsuch as a compact disc (CD) or floppy disk, etc.), such that a userterminal and/or base station can obtain the various methods uponcoupling or providing the storage means to the device. Moreover, anyother suitable technique for providing the methods and techniquesdescribed herein to a device can be utilized.

It is to be understood that the claims are not limited to the preciseconfiguration and components illustrated above. Various modifications,changes and variations may be made in the arrangement, operation anddetails of the methods and apparatus described above without departingfrom the scope of the claims.

The techniques provided herein may be utilized in a variety ofapplications. For certain aspects, the techniques presented herein mayhe incorporated in a base station, a mobile handset, a personal digitalassistant (PDA) or other type of wireless device that operate in UWBpart of spectrum with processing logic and elements to perform thetechniques provided herein.

1. A method for communication, comprising: generating at least spreadingcode from at least one of a preferred Golay generator, and a preferredgeneralized Golay generator comprising a plurality of preferred Golaygenerators; spreading at least a portion of a data stream with the atleast one spreading code; and transmitting the spread data stream